Tag
#전자회로
#MOSFET
#Verilog
#반도체
#pmos
#half adder
#full adder
#아날로그집적회로
#bandgap reference
#small signal analysis
#small signal model
#nmos
#BGR
#clk divider
#4 bit full adder
#ctat
#ptat
#cascode
#diode connected load
#common source
#source degneration
#common source amplifier
#input impedance
#output impedance
#transconductance
#drain current
##channel length modulation
#channel length modulation
#pinch off
#early effect
#pnp bjt
#npn bjt
#전위장벽
#built-in potential
#poential barrier
#pn 접합
#DEPLETION REGION
#베릴로그
#Testbench
#공핍영역
#Reverse Bias
#Forward Bias
#PN Junction
#Current Mirror
#opamp
#인스턴스화
#CLM
#bjt
#Leakage current
#amplifier
#증폭기